Galileo Spacecraft Pages
Galileo LGA Processor Status
Memo from Chris Brull, May 21, 1996
I want to give you a quick summary of where the work on the LGA processing software stands.
I've created an updated version of the data block description of the LGA archive file which reflects changes made at the March team meeting. The new description can be found in the document titled LGA Processing Software for the Energetic Particles Detector dated May 20, 1996. Changes include addition of a Jovicentric spin axis coordinate system, magnetic field variance, and pitch and phase angles. I don' think there should be any further changes to the archive file format. Copies of the new version of this document will be sent by mail today.
The current version of the LGA Processor still leaves some sections of the archive file blank. All of the data contained in the EPD packets is processed into the archive file. In the header block, the following sections are completed: the file data block, the time block, the instrument status block, and the mode information. The entire rate channel block, time accumulation block and PHA event block are populated. The data quality block currently indicates the presence or absence of data in the rate data block. Work continues to process the MAG packets and AACS information into the archive files.
Several plots are attached to this memo showing the results of the LGA processor on several files obtained from GLLSVC in the directory TESTBED:[SBL...]. The plots are generated from data labeled EPD_96-047.PKTS and EPD_96-100.PKTS. The plots are labeled with the files from which they were generated and the channels and sectors plotted. A simple flow chart is also enclosed showing the programs and files used to generate the line plots.
I have run several checks to determine the correctness and accuracy of the processing. Several hex dump records were processed by hand and compared to the results of the processor. I dumped each of the log compressed counts to check the log decompression algorithm. Each channel's mapping from LGA packet to archive file was also checked. Program execution has been traced with the debugger and log files to check the correctness of the algorithm implementation. Everything appears in order. Actual real time data in the Jovian environment will allow us to complete the verification of the LGA processor.
One item which I cannot yet explain occurs in several of the sample LGA packets files. The stepper motor is supposed to be stepping continuously between motor position zero and six. Science records are defined as motor steps 0-5 or 1-6. On occasion, however, some science records show an ending position other than 0, 1, 5, or 6. According to Steve, this should not happen. It does happen in several of the test files listed on the following page.
I look forward to your comments on the results thus far and how they compare to the expected content of the sample packet files.
Figure 2-3. Flow chart for line plot generation
1. SFDU EPD Packet Files include:
96_047 Map1 data
96_068 Map1 data
96_100 Map1 - Map2 data
96_103 Map1 data
96_115 Record Mode only
96_129 Map1 data
96_131 Map1 data
from directory on GLLSVC testbed:[SBL...]
2. VEGII and IDL are the plotting software.
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Updated 6/24/04, T. Hunt-Ward